1. Field of the Invention
The present invention relates to a data reading circuit including a current sensing amplifier circuit for reading out data stored in memory cells.
2. Description of the Related Art
The current sensing amplifier circuit is used, for example, in a bipolar-CMOS type static random access memory (referred to as a BiCMOS-type SRAM hereinafter).
The BiCMOS-type SRAM comprises memory cells composed of N-type MOS FETs and high resistance loads, and a data reading circuit composed of bipolar transistors and CMOS-type FETs (Complementary MOS FETs).
The data reading circuit of the BiCMOS-type SRAM includes a current sensing type current sensing amplifier circuit for shortening the data reading time.
The technique relating to the data reading circuit of the BiCMOS-type SRAM is disclosed, for instance, in a circuit illustrated in FIG. 2. The circuit in FIG. 2 exemplifies a data reading circuit including a current sensing amplifier circuit.
The data reading circuit illustrated in FIG. 2 comprises four first sensing amplifiers SA11 to SA14 connected to a pair of common data lines DL and DL and four pairs of bit lines BL11, BL11 to BL14, BL14, a current sensing amplifier circuit CSA connected to the pair of common data lines DL and DL, a Second sensing amplifier SA2 connected to the current sensing amplifier circuit CSA and a third sensing amplifier SA3 connected between the second sensing amplifier SA2 and output terminals DO and DO.
The four pairs of the bit lines are connected to four first sensing amplifiers SA11 to SA14 respectively at one ends thereof, while to a plurality of memory cells MCs directly or by way of switches at the other ends thereof respectively.
A memory cell MC stores therein a data represented by a pair of electric signals which are complementary to each other. A data stored in the memory cells is read out into a pair of bit lines in response to a selection signal supplied from a selection circuit, not shown. Since the data is represented by a pair of electric signals which are complementary to each other, for example, a bit line B11 goes high while the other bit line BL11 goes low. That is, a voltage potential difference is generated between the pair of bit lines (between the bit line B11 and the other bit line BL11).
The first sensing amplifier SA11 converts the complementary voltage signals of the pair of bit lines into complementary current signals and supplies the same to the pair of common data lines DL and DL.
The complementary current signals supplied to the pair of common data lines DL and DL are further supplied to the current sensing amplifier circuit CSA.
The current sensing circuit CSA converts the complementary current signals into complementary voltage signals. The voltage amplitude between the complementary voltage signals is about 300 mV in case of a 1M bit class BiCMOS-type SRAM.
The complementary voltage signals converted by the current sensing circuit CSA are amplified by the second sensing amplifier SA2 and are supplied to the third sensing amplifier SA3. The voltage amplitude between the voltage signals supplied to the third sensing amplifier SA3 is about 800 mV. That is, the voltage amplitude between the voltage signals supplied from the second amplifier SA2 is greater than that supplied from the current sensing amplifier circuit CSA.
The voltage signals supplied from the second sensing amplifier SA2 are amplified to CMOS logical level (about 5 V in voltage amplitude) and are output from output terminals DO and DO.
Thus the voltage signals having a voltage amplitude of about 300 mV produced by the current sensing amplifier circuit CSA are finally amplified to CMOS level voltage signals having a voltage amplitude of about 5 V.
The data reading circuit illustrated in FIG. 2 shortens the reading time of data by keeping the voltage potentials of the data lines DL and DL at a given level. In order to keep the voltage potentials of the data lines DL and DL at a given level, it is necessary to reduce the voltage amplitude between the voltage signals produced by the current sensing amplifier circuit CSA. (approximately less than 300 mV in case of 1 Mb BiCMOS-type SRAM).
On the other hand, the data reading circuit needs the third sensing amplifier SA3 for amplifying the voltage signals produced by the current sensing amplifier circuit CSA to the CMOS logical level in order to obtain the necessary CMOS level voltage signals finally. However, the voltage signals supplied to the third sensing amplifier SA3 needs to be large in its voltage amplitude in order to quicken the operation of the third sensing amplifier SA3 (approximately more than 800 mV in case of 1 Mb BiCMOS-type SRAM). Accordingly, the data reading circuit needs the second sensing amplifier SA2 for amplifying the voltage signals produced by the current sensing amplifier circuit CSA.